A collaborative paper on side-channel security has received prominent recognition in the field of hardware security. The paper, “VALIANT: An EDA Flow for Side-Channel Leakage Evaluation and Tailored Protection,” was selected for Top Picks in Hardware and Embedded Security at the 2025 International Conference on Computer-Aided Design (ICCAD).
The study, originally published in IEEE Transactions on Computers, introduces VALIANT, a novel EDA tool designed to evaluate and mitigate side-channel information leakage vulnerabilities in hardware designs. The work was a joint effort between Sudipta Paria and Dr. Swarup Bhunia from UF, and Dr. Debdeep Mukhopadhyay, Rajat Sadhukhan, and Sayandeep Saha from IIT Kharagpur. VALIANT has already been adopted by industry as a part of their tool-flow for side channel evaluation.
The Top Picks Workshop creates a venue to showcase the best of high impact recently published works in the area of hardware and embedded security. These works are selected from conference and journal papers that have appeared in leading hardware security conferences. This selection was the outcome of a two-round evaluation: first through a peer-review process, and secondly, based on presentations at ICCAD 2025. The final presentation was held during ICCAD 2025 in Munich, Germany.
VALIANT’s selection for Top Picks highlights its significance and broad impact in the field of hardware security. The work is set to be featured in an upcoming special issue of IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems (TCAD) journal.