Post-Silicon Validation and Debug

Faculty:Prabhat Mishra
Project Description:The goal of post-silicon validation is to ensure that the fabricated, pre-production silicon functions correctly while running actual applications under on-field operating conditions. Post- silicon validation is a complex activity performed under aggressive schedule, accounting for more than 50% of the overall validation cost of a modern integrated circuit. A fundamental challenge in post-silicon validation is limited observability and controllability. Design overhead considerations impose restrictions that only a few hundreds among the millions of internal signals can be traced during a silicon execution. Furthermore, in order fora signal to be observed, the design must be instrumented a priori with appropriate hardware that routes the signal to an observation point. It is therefore crucial to develop techniques to identify trace signals that maximize design visibility under post-silicon observability restrictions. We have developed novel techniques to enhance the observability during post-silicon debug. We have also developed observability-aware test generation techniques. The application of machine learning techniques has been extensively explored to improve the scalability of trace signal selection techniques. Extensive experimental results exhibit significant improvement in both overall signal observability and signal selection time.